Design Verification Engineer

Verification Engineer

Bristol and/or fully remote within the United Kingdom.

£60,000 - £85,000 DOE

AI Neuromorphic Silicon chips

I am seeking a Digital Verification Engineer to join a dynamic fabless semiconductor team. You will be part of a wider group that will include Digital, Analog and BE Engineers and work on the development of AI neuromorphic chips. You will be responsible for the design, simulation and verification of digital block implemented in RTL for various functions including control state machine DSP, and multiple clock domain interface management.

Their technology provides fast and easy conversion of trained Neural Networks into minuscule AI silicon chips with ultra-low power consumption, low latency and small size.

1. Develop test benches and test cases for block-level functional verification.
2. Work with backend/implementation teams to address synthesis, timing, DFT issues for ASIC implementation.
3. Define verification and test plan, run regressions, reproduce, and debug functional and performance bugs.
4. Analyse circuit for failure root cause analysis, investigate anomalous observations in silicon across various conditions, including PVT variations, and propose solutions.
5. Verification of various IPs/Sub IPs integrated to top level SoC.

1. RTL design/verification of digital circuits in Verilog.
2. Develop test benches and test cases for block-level functional verification.
3. Define verification and test plan, run regressions, reproduce, and debug functional and performance bugs.
4. Proficiency with EDA tools (Cadence, Mentor) and design languages including Verilog and SystemVerilog.
5. Understanding of synthesis, static timing analysis, and netlist verifications.
6. UVM expertise.

Please note: You must have full UK working rights to be considered for this role.

For more information, please contact Rachel Mason at IC Resources.